VHDL in Alliance – Behavioral Simulations
February 7, 2011 30 Comments
Hello everyone and welcome to the second tutorial on the Alliance VLSI package! 🙂 Here we will look at how we can build a digital system using a behavioral model and simulate the VHDL code we write. I hope you have read the previous tutorial on genpat. We will need what ever we learn there to test the code we write in this tutorial. I also assume that you are familiar with VHDL. Alright then. Lets begin!
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